Anterwell Technology Ltd.
| Payment Terms | T/T, Western Union,PayPal |
| Supply Ability | 9000PCS |
| Delivery Time | 1 Day |
| Packaging Details | please contact me for details |
| Features | Very high speed-10 MBit/s |
| Features2 | Superior CMR-10 kV/µs |
| Features3 | Double working voltage-480V |
| Features4 | Fan-out of 8 over -40°C to +85°C |
| Features5 | Logic gate output |
| Features6 | Strobable output |
| Brand Name | T o shiba |
| Model Number | 6N137 |
| Certification | Original Factory Pack |
| Place of Origin | Taiwan |
View Detail Information
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Product Specification
| Payment Terms | T/T, Western Union,PayPal | Supply Ability | 9000PCS |
| Delivery Time | 1 Day | Packaging Details | please contact me for details |
| Features | Very high speed-10 MBit/s | Features2 | Superior CMR-10 kV/µs |
| Features3 | Double working voltage-480V | Features4 | Fan-out of 8 over -40°C to +85°C |
| Features5 | Logic gate output | Features6 | Strobable output |
| Brand Name | T o shiba | Model Number | 6N137 |
| Certification | Original Factory Pack | Place of Origin | Taiwan |
| High Light | multi emitter transistor ，silicon power transistors | ||
6N137Ired Photo IC Degital Logic Isolation Tele Communication Analog Data
6N137
DESCRIPTION
The 6N137, HCPL-2601/2611 single-channel and HCPL-2630/2631 dual-channel optocouplers consist of a 850 nm AlGaAS LED, optically coupled to a very high speed integrated photodetector logic gate with a strobable output. This output features an open collector, thereby permitting wired OR outputs. The coupled parameters are guaranteed over the temperature range of -40°C to +85°C. A maximum input signal of 5 mA will provide a minimum output sink current of 13 mA (fan out of 8). An internal noise shield provides superior common mode rejection of typically 10 kV/µs. The HCPL- 2601 and HCPL- 2631 has a minimum CMR of 5 kV/µs. The HCPL-2611 has a minimum CMR of 10 kV/µs.
FEATURES
• Very high speed-10 MBit/s
• Superior CMR-10 kV/µs
• Double working voltage-480V
• Fan-out of 8 over -40°C to +85°C
• Logic gate output • Strobable output
• Wired OR-open collector
• U.L. recognized (File # E90700)
APPLICATIONS
• Ground loop elimination
• LSTTL to TTL, LSTTL or 5-volt CMOS
• Line receiver, data transmission
• Data multiplexing
• Switching power supplies
• Pulse transformer replacement
• Computer-peripheral interface
TRUTH TABLE
| Input | Enable | Output |
| H | H | L |
| L | H | H |
| H | L | H |
| L | L | H |
| H | NC | L |
| L | NC | H |
Noted:
1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package VCC and GND pins of each device.
2. Each channel.
3. Enable Input - No pull up resistor required as the device has an internal pull up resistor.
4. tPLH - Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
5. tPHL - Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
6. tr - Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
7. tf - Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
8. tELH - Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input voltage pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
9. tEHL - Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input voltage pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
10. CMH - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., VOUT > 2.0 V). Measured in volts per microsecond (V/µs).
11. CML - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the low output state (i.e., VOUT < 0.8 V). Measured in volts per microsecond (V/µs).
12. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
Company Details
Business Type:
Distributor/Wholesaler,Trading Company
Year Established:
2004
Total Annual:
500000-1000000
Employee Number:
20~30
Ecer Certification：
Site Member
King--- Originator of ANTERWELL, engaged in the IC electronics industry in 1998 and establish ANTERWELL in 2004. The company is located in Shenzhen Huaqiang North, the largest electronic center in Asia. Our main business is the technical development and ... King--- Originator of ANTERWELL, engaged in the IC electronics industry in 1998 and establish ANTERWELL in 2004. The company is located in Shenzhen Huaqiang North, the largest electronic center in Asia. Our main business is the technical development and ...
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